College/University/Organization
Name: Sri Ramakrishna Engineering College, Coimbatore
Organizing Department: Department of Electronics and Communication Engineering
Event Date: 03/28/2016 -- 03/28/2016
(MM/DD/YYYY)
Last Date: 03/24/2016 (MM/DD/YYYY)
Address: Coimbatore , Tamilnadu, India
Registration Fee:
Rs. 300
College/University/Organization
Website: www.srec.ac.in
Event Website / Brochure link: www.srec.ac.in
Email Address: hod-mevlsi@srec.ac.in
About Event:
The objective of the workshop is to provide the broad capability
in all areas of design and verification for the industry standards using System
Verilog. System Verilog is a combined
hardware description and verification language based on extension of verilog.
System Verilog is a massive language that breaks down into three separate
blocks; the design language, assertions, and the testbench language. This workshop
is structured to enable engineers to develop their skills to cover the full
breadth of System Verilog features for both design and verification.
Who Can Participate?
Research Scholars, UG/PG Students , Industry / R&D
organizations & Faculty from Academic
Institutions
Accommodation Details:
Accommodation is available on chargeable basis if requested
Other Details:
Contact Details:
Contact :
The Convenor,
Department of ECE-PG,
Sri Ramakrishna Engineering College,
Coimbatore – 641 022.
Phone : 0422-2460088, 2461588
Mobile : 99941 58642, 94863 55965
Email id: hod-mevlsi@srec.ac.in
The Convenor,
Department of ECE-PG,
Sri Ramakrishna Engineering College,
Coimbatore – 641 022.
Phone : 0422-2460088, 2461588
Mobile : 99941 58642, 94863 55965
Email id: hod-mevlsi@srec.ac.in
For any clarification about
this event, please contact the above mentioned address.
A One Day
National Workshop on VLSI System Design
& Verification using System
Verilog-2016-Sri Ramakrishna Engineering College, Coimbatore -Coimbatore
-Tamilnadu-India
See Also