ASIC design workshop Opportunities in VLSI Industries & Hardware modeling using Verilog HDL & hands- on training in CAD tools, September 2018, K. Ramakrishnan college of engineering, Trichy, Tamilnadu, India

College/University/Organization Name: K. Ramakrishnan college of engineering
Organizing Department: ECE
Event Date: 09/10/2018 -- 09/12/2018    (MM/DD/YYYY)
Last Date: 09/10/2018    (MM/DD/YYYY)
Address: Trichy, Tamilnadu, India
 

Registration Fee:

1000/-

College/University/Organization Website: https://vlsiclubkrce.wixsite.com/vlsiclub

Event Website / Brochure link: https://vlsiclubkrce.wixsite.com/vlsiclub/workshops-and-conferences

Email Address: rex.vlsiclub@gmail.com

About Event:

The workshop will cover the following topics:
Combinational circuits design.
Sequential circuits design.
Synchronous circuits design.
Memories design.
FSM design.
Hardware verificationusing latest FPGA device.
Testbenches.
Design for test.

Who Can Participate?

Students,Faculties.

Accommodation Details:

yes.
contact:9597277498.
rex.vlsiclub@gmail.com

Other Details:

We also support core company placements.

Contact Details:
George rex
9597277498
rex.vlsiclub@gmail.com

For any clarification about this event, please contact the above mentioned address.

Opportunities in VLSI Industries & Hardware modeling using Verilog HDL & hands- on training in CAD tools-2018-K. Ramakrishnan college of engineering-Trichy-Tamilnadu-India

See Also

ASIC design workshop-Trichy-2018-K. Ramakrishnan college of engineering-tamilnadu